Heterogeneous Computing Architectures

Scalable & Heterogeneous Computing Architectures

The demands of modern industrial devices and autonomous systems have long exceeded the capacity of any single processor type. We use deterministic microcontrollers (Cortex-M) for demanding real-time control algorithms, powerful application processors (Cortex-A) for rich UIs, networking and AI inference, bridging these two worlds on the same silicon (SoC) via Asymmetric Multiprocessing (AMP) and reliable IPC/RPMsg protocols.

Deterministic Network Architecture

EtherCAT + Hard Real-Time RTOS

For motor control and multi-axis lines we design EtherCAT and the real-time OS together: cycle time, latency distribution and packet loss are measured on the bench and reported with the setup.

EC-MasterMaster stack on our measurement bench
EtherCATEC-Master / SSCTI-RTOSFreeRTOSCAN-FDCANopen

Secure BSP Ecosystem

Yocto + Secure Boot + OTA

A kernel and image stripped of unneeded packages for custom boards, boot time measured and cut stage by stage, a secure boot chain, SBOM generation, full control of the bootloader and a safe OTA update path.

Yocto LTSKirkstone and Scarthgap
Yocto ProjectU-BootDevice TreeSquashFSmusl libcSecure Boot

Edge Computing and Sensor Fusion

TensorRT + CUDA + Sensor Fusion

Hardware-accelerated real-time vision for autonomous C-UAS, railway obstacle detection and industrial quality control: INT8 quantisation, offloading to the Jetson DLA and fusing multi-sensor data.

INT8 / FP16TensorRT quantisation
TensorRTCUDAJetson DLAHailo-8LDeepStreamOpenCVYOLOv8

Command and Control and HMI

Qt/QML + C++17 + Telemetry

Touchscreen interfaces for defence and industrial systems, real-time telemetry dashboards and a C++17 back end, running directly on embedded displays through EGLFS or Wayland.

EGLFSFull screen without a window manager
Qt 6QMLC++17EGLFSWaylandOpenGL ES

Low-Latency Video and C2

WebRTC + GStreamer + HW Encode

Multi-sensor video from tactical units to command centres, with the latency budget defined and measured glass to glass. Secure UDP transport on air-gapped networks, hardware-accelerated H.264/H.265 and multi-source synchronisation.

WebRTCLow-latency transport
WebRTCGStreamerV4L2RTSPHW Encode/DecodeUDP

Tactical Autonomous Communication

ROS2 + DDS + MQTT

Message distribution for autonomous swarms and intermittent networks: low-latency publish-subscribe with ROS 2/DDS, telemetry collection over MQTT and secure transport protocols for closed networks.

MeshTolerates broken links
ROS2DDSMQTTgRPCProtobufZeroMQ
Supported Processor & Silicon Architectures

SoC and accelerator families we work with

NXP i.MX8M PlusSoC
NXP i.MX6SoC
TI AM6442SoC
TI AM62xSoC
TI AM64xSoC
TI JacintoSoC
NVIDIA Jetson OrinGPU
NVIDIA Jetson AGXGPU
Hailo-8LAI Accelerator
Core System Software & Isolation Layer
TI AM64x
NXP i.MX8MP
EtherCAT
Yocto Project
NVIDIA Jetson
TensorRT
WebRTC
C/C++
FreeRTOS
TI AM64x
NXP i.MX8MP
EtherCAT
Yocto Project
NVIDIA Jetson
TensorRT
WebRTC
C/C++
FreeRTOS
TI AM64x
NXP i.MX8MP
EtherCAT
Yocto Project
NVIDIA Jetson
TensorRT
WebRTC
C/C++
FreeRTOS
TI AM64x
NXP i.MX8MP
EtherCAT
Yocto Project
NVIDIA Jetson
TensorRT
WebRTC
C/C++
FreeRTOS
TI-RTOS
Qt/QML
GStreamer
CUDA
HAILO
Docker
ROS2
MQTT
OpenCV
U-Boot
TI-RTOS
Qt/QML
GStreamer
CUDA
HAILO
Docker
ROS2
MQTT
OpenCV
U-Boot
TI-RTOS
Qt/QML
GStreamer
CUDA
HAILO
Docker
ROS2
MQTT
OpenCV
U-Boot
TI-RTOS
Qt/QML
GStreamer
CUDA
HAILO
Docker
ROS2
MQTT
OpenCV
U-Boot

Let's evaluate your project's heterogeneous architecture requirements, power budget and regulatory constraints together.

Architecture Consulting Session